Topology Design of Extended Torus and Ring for Low Latency Network-on-Chip Architecture

In essence, Network-on-Chip (NoC) also known as on-chip interconnection network has been proposed as a design solution to System-on-Chip (SoC). The routing algorithm, topology and switching technique are significant because of the most influential effect on the overall performance of Network-on-Chip (NoC). Designing of large scale topology alongside the support of deadlock free, low latency, high throughput and low power consumption is notably challenging in particular with expanding network size. This paper proposed an 8x8 XX-Torus and 64 nodes XX-Ring topology schemes for Network-on-Chip to minimize the latency by decrease the node diameter from the source node to destination node. Correspondingly, we compare in differences on the performance of mesh, full-mesh, torus and ring topologies with XX-Torus and XX-Ring topologies in term of latency. Results show that XX-Ring outperforms the conventional topologies in term of latency. XX-Ring decreases the average latency by 106.28%, 14.80%, 6.7 1%, 1.73%, 442.24% over the mesh, fully-mesh, torus, XX-torus, and Ring topologies

Energy efficient partition-lightpath scheme for IP over WDM core networks

In this paper, the research focus on the development of energy saving schemes with roots in sleep modes that support the evolution of greener core optical IP networks. The cornerstone of the adopted strategy is partition-lightpath schemes underpinned by the hibernation state implemented through a modification of the intelligent control plane, in particular for transparent network architectures under different scenarios. An enhanced multi-level operational hibernation mode through partition-lightpath was defined including functionality, structure considering its implementation issues. Through the use of appropriate design parameters the impact on blocking probability, wavelengths assignment, LSP connection requests, degree of node connectivity and network utilization can be minimized while also achieving energy savings. Evaluation of this scheme indicates potential reduction in power consumption from 9% up to 17% at the expense of reduced network performance